发明申请
- 专利标题: LOCAL STRESS ENGINEERING FOR CMOS DEVICES
- 专利标题(中): CMOS器件的局部应力工程
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申请号: US12020916申请日: 2008-01-28
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公开(公告)号: US20090191679A1公开(公告)日: 2009-07-30
- 发明人: Qiqing Ouyang , Kathryn T. Schonenberg
- 申请人: Qiqing Ouyang , Kathryn T. Schonenberg
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L21/8236
- IPC分类号: H01L21/8236
摘要:
A first dielectric layer is formed over a PFET gate and an NFET gate, and lithographically patterned to expose a PFET area, while covering an NFET area. Exposed PFET active area is etched and refilled with a SiGe alloy, which applies a uniaxial compressive stress to a PFET channel. A second dielectric layer is formed over the PFET gate and the NFET gate, and lithographically patterned to expose the NFET area, while covering the PFET area. Exposed NFET active area is etched and refilled with a silicon-carbon alloy, which applies a uniaxial tensile stress to an NFET channel. Dopants may be introduced into the SiGe and silicon-carbon regions by in-situ doping or by ion implantation.
公开/授权文献
- US07678634B2 Local stress engineering for CMOS devices 公开/授权日:2010-03-16