发明申请
- 专利标题： PARALLEL DATA PROCESSING APPARATUS
- 专利标题（中）： 并行数据处理设备
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申请号： US12363690申请日： 2009-01-30
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公开(公告)号： US20090198898A1公开(公告)日： 2009-08-06
- 发明人: Dave Stuttard , Dave Williams , Eamon O'Dea , Gordon Faulds , John Rhoades , Ken Cameron , Phil Atkin , Paul Winser , Russell David , Ray McConnell , Tim Day , Trey Greer
- 申请人： Dave Stuttard , Dave Williams , Eamon O'Dea , Gordon Faulds , John Rhoades , Ken Cameron , Phil Atkin , Paul Winser , Russell David , Ray McConnell , Tim Day , Trey Greer
- 申请人地址： GB Hunts Ground Road
- 专利权人： ClearSpeed Technology plc
- 当前专利权人： ClearSpeed Technology plc
- 当前专利权人地址： GB Hunts Ground Road
- 优先权： GB9908199.4 19990409; GB9908201.8 19990409; GB9908203.4 19990409; GB9908204.2 19990409; GB9908205.9 19990409; GB9908209.1 19990409; GB9908211.7 19990409; GB9908214.1 19990409; GB9908219.0 19990409; GB9908222.4 19990409; GB9908225.7 19990409; GB9908226.5 19990409; GB9908227.3 19990409; GB9908228.1 19990409; GB9908229.9 19990409; GB9908230.7 19990409; GBPCT/GB00/01332 20000407
- 主分类号： G06F15/80
- IPC分类号： G06F15/80 ; G06F12/08 ; G06F9/02
摘要：
A controller for controlling a data processor having a plurality of processor arrays, each of which includes a plurality of processing elements, comprises a retrieval unit operable to retrieve a plurality of incoming instructions streams in parallel with one another, and a distribution unit operable to supply such incoming instruction streams to respective ones of the said plurality of processor arrays.
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