A method, system and program are provided for generating level sensitive scan design (LSSD) clock signals from a general scan design (GSD) clock buffer using an intermediate clock signal and one or more first mode control signals to generate a plurality of LSSD clock signals from an output section of the GSD clock buffer that receives the intermediate clock signal and the first mode control signal(s), where the GSD clock buffer is also configured to generate a plurality of GSD clock signals in response to receiving a GSD mode, generating an intermediate clock signal from the input section of the GSD clock buffer in response receiving a GSD mode signal.