发明申请
US20090201066A1 Digitally Clock with Selectable Frequency and Duty Cycle 有权
数字时钟,可选频率和占空比

  • 专利标题: Digitally Clock with Selectable Frequency and Duty Cycle
  • 专利标题(中): 数字时钟,可选频率和占空比
  • 申请号: US12423774
    申请日: 2009-04-14
  • 公开(公告)号: US20090201066A1
    公开(公告)日: 2009-08-13
  • 发明人: Viet Linh DoHongming AnJim Lew
  • 申请人: Viet Linh DoHongming AnJim Lew
  • 主分类号: G06F1/04
  • IPC分类号: G06F1/04
Digitally Clock with Selectable Frequency and Duty Cycle
摘要:
A system and method are provided for controlling the duty cycle and frequency of a digitally generated clock. The method accepts a first clock signal having a fixed first frequency. A frequency control word with a first pattern is loaded into a first plurality of serially-connected registers. A duty cycle control word with a second pattern is loaded into a second plurality of serially-connected registers. A register clock signal is generated in response to the first clock and the first pattern. Then, a digital clock signal is generated having a frequency and duty cycle responsive to the register clock signal and the second pattern.
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