A pseudo random number generator including a plurality of non-singular feedback shift registers each configured to output a bit-sequence. At least a first of the plurality of non-singular feedback shift registers has one or more first cycles of a length less than or equal to two, and a second of the plurality of non-singular feedback shift registers has one or more second cycles of a length less than or equal to two, and the one or more first cycles encompass a first set of one or more of shift-register state vectors 000 . . . , 111 . . . , 010 . . . and 101 . . . and the one or more second cycles encompass a second set of one or more of the shift-register state vectors 000 . . . , 111 . . . , 010 . . . and 101 . . . with the first and the second set being disjoint.