A storage device for storing data sent from a host apparatus comprises a plurality of processors sending to a cache memory controller an access instruction relating to transmission of the data, based on an access request relating to the transmission of the data, the access request being sent from the host apparatus; and an access instruction sending unit exclusively sending to the cache memory the access instruction sent from the plurality of processors, wherein the access instruction sending unit includes a plurality of storage units for storing an access instruction which requires a response, and wherein when the access instruction which requires a response is stored in all of the storage units, the access instruction sending unit sends only an access instruction which requires a response to the cache memory controller.