发明申请
- 专利标题: Latched Address Multi-Chunk Write to EEPROM
- 专利标题(中): 锁存地址多块写入EEPROM
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申请号: US12469531申请日: 2009-05-20
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公开(公告)号: US20090228644A1公开(公告)日: 2009-09-10
- 发明人: Douglas J. Lee , Mehrdad Mofidi , Sanjay Mehrotra , Raul-Adrian Cernea
- 申请人: Douglas J. Lee , Mehrdad Mofidi , Sanjay Mehrotra , Raul-Adrian Cernea
- 主分类号: G06F12/02
- IPC分类号: G06F12/02 ; G06F12/00
摘要:
An EEPROM system includes flash EEPROM cells organized into subarrays. Pairs of subarrays share row address decoders by sharing word lines, and individual subarrays have dedicated column address decoders and data registers. Each row decoder has an associated row address latch, and each column decoder has an associated column address latch. Multiple data chunks are concurrently written into the subarrays by first latching chunk addresses into the row and column address latches, and corresponding chunks of data into the data registers, then activating a programming signal to initiate concurrent programming and verifying the programming of the data chunks.
公开/授权文献
- US07890694B2 Latched address multi-chunk write to EEPROM 公开/授权日:2011-02-15
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