MULTI-CHIP PACKAGE FOR REDUCING TEST TIME

Invention Application

US20090267203A1 MULTI-CHIP PACKAGE FOR REDUCING TEST TIME 审中-公开

Title translation: 用于减少测试时间的多芯片包装

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Patent Title: MULTI-CHIP PACKAGE FOR REDUCING TEST TIME
Patent Title (中): 用于减少测试时间的多芯片包装
Application No.: US12496576

Application Date: 2009-07-01
Publication No.: US20090267203A1

Publication Date: 2009-10-29
Inventor: Sang-Ho LEE
Applicant: Sang-Ho LEE
Applicant Address: KR Gyeonggi-do
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
Current Assignee Address: KR Gyeonggi-do
Priority: KR2005-0001530 20050107
Main IPC: H01L23/02
IPC: H01L23/02 ; H01L23/34

MULTI-CHIP PACKAGE FOR REDUCING TEST TIME

Abstract:

A multi-chip package is provided. The multi-chip package includes semiconductor chips. The multi-chip package receives selection signals for selecting two or more chips in response to the selection signals. Any number of chips may be simultaneously selected for a test and the test time can be reduced.

Abstract(Chinese):

提供了多芯片封装。多芯片封装包括半导体芯片。多芯片封装响应于选择信号接收用于选择两个或更多个芯片的选择信号。可以同时选择任何数量的芯片用于测试，并且可以减少测试时间。

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IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L23/00	半导体或其他固态器件的零部件（H01L25/00优先）
H01L23/02	.容器；封接（H01L23/12，H01L23/34，H01L23/48，H01L23/552优先）