发明申请
US20090300314A1 MEMORY SYSTEMS AND METHODS FOR CONTROLLING THE TIMING OF RECEIVING READ DATA
有权
用于控制接收读取数据的时序的存储器系统和方法
- 专利标题： MEMORY SYSTEMS AND METHODS FOR CONTROLLING THE TIMING OF RECEIVING READ DATA
- 专利标题（中）： 用于控制接收读取数据的时序的存储器系统和方法
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申请号： US12128883申请日： 2008-05-29
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公开(公告)号： US20090300314A1公开(公告)日： 2009-12-03
- 发明人: Paul A. LaBerge , James B. Johnson
- 申请人： Paul A. LaBerge , James B. Johnson
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 主分类号： G06F12/00
- IPC分类号： G06F12/00
摘要：
Embodiments of the present invention provide memory systems having a plurality of memory devices sharing an interface for the transmission of read data. A controller can identify consecutive read requests sent to different memory devices. To avoid data contention on the interface, for example, the controller can be configured to delay the time until read data corresponding to the second read request is placed on the interface.
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