发明申请
US20090302394A1 CMOS INTEGRATED CIRCUITS WITH BONDED LAYERS CONTAINING FUNCTIONAL ELECTRONIC DEVICES
失效
CMOS集成电路与包含功能电子设备的绑定层
- 专利标题: CMOS INTEGRATED CIRCUITS WITH BONDED LAYERS CONTAINING FUNCTIONAL ELECTRONIC DEVICES
- 专利标题(中): CMOS集成电路与包含功能电子设备的绑定层
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申请号: US12237152申请日: 2008-09-24
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公开(公告)号: US20090302394A1公开(公告)日: 2009-12-10
- 发明人: Shinobu Fujita
- 申请人: Shinobu Fujita
- 申请人地址: US CA San Jose
- 专利权人: TOSHIBA AMERICA RESEARCH, INC.
- 当前专利权人: TOSHIBA AMERICA RESEARCH, INC.
- 当前专利权人地址: US CA San Jose
- 主分类号: H01L27/06
- IPC分类号: H01L27/06 ; H01L21/8238
摘要:
A complementary metal oxide semiconductor (CMOS) circuit having integrated functional devices such as nanowires, carbon nanotubes, magnetic memory cells, phase change memory cells, ferroelectric memory cells or the like. The functional devices are integrated with the CMOS circuit. The functional devices are bonded (e.g. by direct bonding, anodic bonding, or diffusion bonding) to a top surface of the CMOS circuit. The functional devices are fabricated and processed on a carrier wafer, and an attachment layer (e.g. SiO2) is deposited over the functional devices. Then, the CMOS circuit and attachment layer are bonded. The carrier wafer is removed (e.g. by etching). The functional devices remain attached to the CMOS circuit via the attachment layer. Apertures are etched through the attachment layer to provide a path for electrical connections between the CMOS circuit and the functional devices.