发明申请
US20090304135A1 SYNCHRONOUS CLOCK GENERATION APPARATUS AND SYNCHRONOUS CLOCK GENERATION METHOD 审中-公开
同步时钟发生装置和同步时钟生成方法(SYNCHRONOUS CLOCK GENERATION APPARATUS AND SYNCHRONOUS CLOCK GENERATION METHOD

  • 专利标题: SYNCHRONOUS CLOCK GENERATION APPARATUS AND SYNCHRONOUS CLOCK GENERATION METHOD
  • 专利标题(中): 同步时钟发生装置和同步时钟生成方法(SYNCHRONOUS CLOCK GENERATION APPARATUS AND SYNCHRONOUS CLOCK GENERATION METHOD
  • 申请号: US12257618
    申请日: 2008-10-24
  • 公开(公告)号: US20090304135A1
    公开(公告)日: 2009-12-10
  • 发明人: Akihiro SuzukiHiroshi Sonobe
  • 申请人: Akihiro SuzukiHiroshi Sonobe
  • 优先权: JP2003-423396 20031219
  • 主分类号: H04L7/00
  • IPC分类号: H04L7/00
SYNCHRONOUS CLOCK GENERATION APPARATUS AND SYNCHRONOUS CLOCK GENERATION METHOD
摘要:
A synchronous clock generation apparatus including a multiplier for multiplying a horizontal synchronizing signal by a horizontal synchronizing pulse signal to generate multiplication data, a gain variable digital LPF for extracting only DC components from the multiplication data and capable of performing gain adjustment, and a controller for calculating gain adjustment data, lock center frequency setting data, and LPF gain adjustment data based on the correction data. The controller detects an amount of deviation from the lock center frequency and an amount of variation, displaces the lock center frequency and shifts the lock range along the frequency axis to enlarge the apparent lock range when the amount of deviation is large, and reduces the gain to improve lock precision when the amount of variation is small, without expanding bits in the circuit configuration.
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