发明申请
- 专利标题: METHOD AND APPARATUS FOR SECURING DIGITAL INFORMATION ON AN INTEGRATED CIRCUIT READ ONLY MEMORY DURING TEST OPERATING MODES
- 专利标题(中): 一体化电路数字信息保护方法与装置在测试运行模式下只读存储器
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申请号: US12133185申请日: 2008-06-04
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公开(公告)号: US20090307502A1公开(公告)日: 2009-12-10
- 发明人: Serag M. GadelRab , Bin Du , Zeeshan S. Syed , Denis Foley
- 申请人: Serag M. GadelRab , Bin Du , Zeeshan S. Syed , Denis Foley
- 申请人地址: CA Markham
- 专利权人: ATI TECHNOLOGIES ULC
- 当前专利权人: ATI TECHNOLOGIES ULC
- 当前专利权人地址: CA Markham
- 主分类号: H04L9/06
- IPC分类号: H04L9/06
摘要:
The embodiments protect an IC against Design-For-Test (DFT) or other test mode attack. Secrets in ROM or PROM are secured. One embodiment for securing information on an IC includes receiving a ROM read command, writing data from a plurality of ROM address locations to an encryption logic in response to receiving the ROM read command, and writing an encryption logic output of the encryption logic to a test control logic, the encryption logic output representing the data from the plurality of ROM address locations. Writing the data from the plurality of ROM address locations to the encryption logic may also include writing the data from the plurality of ROM address locations to a multiple input shift register (MISR) in response to the ROM read command, and writing an MISR output to the test control logic, the MISR output representing the data from the plurality of ROM address locations.
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