发明申请
US20090313455A1 Instruction issue control wtihin a multithreaded processor 审中-公开
多线程处理器中的指令问题控制

Instruction issue control wtihin a multithreaded processor
摘要:
A multithreaded processor is provided with a saturating counter which serves to generate a thread preference signal to steer selection of which program thread operations are taken from for issue into the multiple processor pipelines. The counter is updated based upon the selections made for issue. The counter is a saturating counter and its sign bit may be used as a thread preference signal when discriminating between two threads. The update made to the count value can be weighted depending upon programmable priorities associated with the respective threads as well as a weighting based upon the time taken to execute the type of operation selected.
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