发明申请
- 专利标题: Semiconductor chip having alignment mark and method of manufacturing the same
- 专利标题(中): 具有对准标记的半导体芯片及其制造方法
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申请号: US12232528申请日: 2008-09-18
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公开(公告)号: US20090315194A1公开(公告)日: 2009-12-24
- 发明人: Jae Kul Lee , Yul Kyo Chung
- 申请人: Jae Kul Lee , Yul Kyo Chung
- 申请人地址: KR Suwon
- 专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 当前专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 当前专利权人地址: KR Suwon
- 优先权: KR10-2008-0059560 20080624
- 主分类号: H01L23/544
- IPC分类号: H01L23/544 ; H01L21/76
摘要:
Disclosed is a semiconductor chip having an alignment mark which is formed on the surface of the semiconductor chip where no external connection bump is formed, and which has the position information of the external connection bump. A method of manufacturing the semiconductor chip having an alignment mark is also provided. Because the semiconductor chip includes the alignment mark having the position information of the external connection bump, the external connection bump is matched with a via which is formed in the external circuit layer of a printed circuit board including the semiconductor chip, thus improving electrical connection with the printed circuit board, and increasing the reliability of the printed circuit board including the semiconductor chip.
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