发明申请
- 专利标题: LOW POWER READ SCHEME FOR READ ONLY MEMORY (ROM)
- 专利标题(中): 只读存储器(ROM)的低功耗读取方案
-
申请号: US12488624申请日: 2009-06-22
-
公开(公告)号: US20090316464A1公开(公告)日: 2009-12-24
- 发明人: Ashish Sharma , Sanjeev Kumar Jain , Manmohan Rana
- 申请人: Ashish Sharma , Sanjeev Kumar Jain , Manmohan Rana
- 申请人地址: US TX Austin
- 专利权人: FREESCALE SEMICONDUCTOR, INC
- 当前专利权人: FREESCALE SEMICONDUCTOR, INC
- 当前专利权人地址: US TX Austin
- 优先权: IN1516/DEL/2008 20080624
- 主分类号: G11C17/00
- IPC分类号: G11C17/00 ; G11C7/00
摘要:
A ROM includes a ROM array, an address decoder, a control circuit, a precharge tracker, a precharge circuit, a reference word line, a reference bit line and a reference sense generator. The control circuit generates control signals for reading the ROM. The address decoder enables a bit line and a word line. The precharge tracker generates a programmable precharge signal, which is provided to the precharge circuit for precharging the enabled bit line. A reference word line is enabled based on the programmable precharge signal and the control signals for tracking the enabled word line. A reference bit line is enabled based on the reference word line for tracking the enabled bit line. The reference sense generator generates a programmable sense signal based on the reference bit line, the programmable precharge signal and the control signals for reading a bit cell corresponding to the enabled bit line and word line.
公开/授权文献
- US07940545B2 Low power read scheme for read only memory (ROM) 公开/授权日:2011-05-10
信息查询