发明申请
- 专利标题: Top Level Hierarchy Wiring Via 1xN Compiler
- 专利标题(中): 顶级层次结构通过1xN编译器
-
申请号: US12201643申请日: 2008-08-29
-
公开(公告)号: US20100058275A1公开(公告)日: 2010-03-04
- 发明人: Anthony L. Polomik , Benjamin J. Bowers , Anthony Correale, Jr. , Matthew W. Baker , Irfan Rashid , Paul M. Steinmetz
- 申请人: Anthony L. Polomik , Benjamin J. Bowers , Anthony Correale, Jr. , Matthew W. Baker , Irfan Rashid , Paul M. Steinmetz
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
Embodiments that route 1×N building blocks using higher-level wiring information for a 1×N compiler are disclosed. Some embodiments comprise determining higher-level coordinates for a blockage of a 1×N building block, determining intra-1×N coordinates for a shape of the blockage via the higher-level coordinates, and creating routes of intra-1×N wires of the 1×N building block that avoid the intra-1×N coordinates. Further embodiments comprise an apparatus having a higher-level wiring examiner to examine higher-level wiring of an area near a 1×N building block of a physical design representation. The apparatus may also have a blockage determiner to determine a blockage that affects intra-1×N wiring for the 1×N building block and a coordinate calculator to calculate coordinates of a shape of the blockage, wherein the calculated coordinates may enable a routing tool to avoid the shape when creating intra-1×N wiring for the 1×N building block.
公开/授权文献
- US07966598B2 Top level hierarchy wiring via 1×N compiler 公开/授权日:2011-06-21
信息查询