Invention Application
US20100059852A1 SEMICONDUCTOR TRANSISTOR DEVICE WITH IMPROVED ISOLATION ARRANGEMENT, AND RELATED FABRICATION METHODS
审中-公开
具有改进隔离布置的半导体晶体管器件及相关制造方法
- Patent Title: SEMICONDUCTOR TRANSISTOR DEVICE WITH IMPROVED ISOLATION ARRANGEMENT, AND RELATED FABRICATION METHODS
- Patent Title (中): 具有改进隔离布置的半导体晶体管器件及相关制造方法
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Application No.: US12209056Application Date: 2008-09-11
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Publication No.: US20100059852A1Publication Date: 2010-03-11
- Inventor: Rohit PAL , David BROWN , Scott LUNING
- Applicant: Rohit PAL , David BROWN , Scott LUNING
- Applicant Address: US TX Austin
- Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee Address: US TX Austin
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L21/76

Abstract:
A method of fabricating a semiconductor device structure is provided. The method begins by providing a substrate having a layer of semiconductor material, a pad oxide layer overlying the layer of semiconductor material, and a pad nitride layer overlying the pad oxide layer. The method proceeds by selectively removing a portion of the pad nitride layer, a portion of the pad oxide layer, and a portion of the layer of semiconductor material to form an isolation trench. Then, the isolation trench is filled with a lower layer of isolation material, a layer of etch stop material, and an upper layer of isolation material, such that the layer of etch stop material is located between the lower layer of isolation material and the upper layer of isolation material. The layer of etch stop material protects the underlying isolation material during subsequent fabrication steps.
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