发明申请
- 专利标题： SEMICONDUCTOR DEVICES HAVING REDUCED GATE-DRAIN CAPACITANCE AND METHODS FOR THE FABRICATION THEREOF
- 专利标题（中）： 具有降低的排气容量的半导体器件及其制造方法
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申请号： US12627739申请日： 2009-11-30
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公开(公告)号： US20100084705A1公开(公告)日： 2010-04-08
- 发明人: Ljubo Radic , Edouard D. de Frésart
- 申请人： Ljubo Radic , Edouard D. de Frésart
- 申请人地址： US TX Austin
- 专利权人： FREESCALE SEMICONDUCTOR, INC.
- 当前专利权人： FREESCALE SEMICONDUCTOR, INC.
- 当前专利权人地址： US TX Austin
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/336
摘要：
Embodiments of a method for fabricating a semiconductor device having a reduced gate-drain capacitance are provided. In one embodiment, the method includes the steps of etching a trench in a semiconductor substrate utilizing an etch mask, widening the trench to define overhanging regions of the etch mask extending partially over the trench, and depositing a gate electrode material into the trench and onto the overhanging regions. The gate electrode material merges between the overhanging regions prior to the filling of the trench to create an empty fissure within the trench. A portion of the semiconductor substrate is removed through the empty fissure to form a void cavity proximate the trench.
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