Invention Application
- Patent Title: SYSTEMS AND METHODS FOR CHARACTERIZING LOOP TERMINATION VIA SINGLE-ENDED LINE TESTING
- Patent Title (中): 通过单端测试来表征环路终止的系统和方法
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Application No.: US12325541Application Date: 2008-12-01
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Publication No.: US20100086105A1Publication Date: 2010-04-08
- Inventor: Vaibhav Dinesh , Kunal Raheja , Amitkumar Mahadevan , Patrick Duvaut
- Applicant: Vaibhav Dinesh , Kunal Raheja , Amitkumar Mahadevan , Patrick Duvaut
- Applicant Address: US NJ Red Bank
- Assignee: CONEXANT SYSTEMS, INC.
- Current Assignee: CONEXANT SYSTEMS, INC.
- Current Assignee Address: US NJ Red Bank
- Main IPC: H04M1/24
- IPC: H04M1/24

Abstract:
Disclosed are various embodiments for determining a state of loop termination. One embodiment comprises receiving an un-calibrated echo signal for the loop under test using frequency domain reflectometry single-ended line testing (FDR-SELT) and determining the state of loop termination based on phase of the un-calibrated echo signal. The step of determining the state of loop termination comprises determining whether the loop is terminated by an open termination or a short termination by correlating the phase of the echo signal with an expected phase of the echo signal derived from measurements taken at the same loop length for open and short terminations. For other embodiments, the amplitude of the un-calibrated echo signal is analyzed to determine whether the loop is terminated by a matched-impedance termination.
Public/Granted literature
- US08300771B2 Systems and methods for characterizing loop termination via single-ended line testing Public/Granted day:2012-10-30
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