An electro component package is disclosed. The electro component package in accordance with an embodiment of the present invention includes a first package substrate having a first chip mounted on an upper surface thereof, the first chip having a through-via formed therein; a second package substrate being separated from the first package substrate and having a second chip mounted on an upper surface thereof; and a connection substrate having one end connected with an upper surface of the first chip and the other end connected with an upper surface of the second chip, the connection substrate electrically connecting the first chip with the second chip.