Invention Application
- Patent Title: Instruction processing apparatus
- Patent Title (中): 指令处理装置
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Application No.: US12654159Application Date: 2009-12-11
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Publication No.: US20100095095A1Publication Date: 2010-04-15
- Inventor: Toshio Yoshida
- Applicant: Toshio Yoshida
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Main IPC: G06F9/30
- IPC: G06F9/30

Abstract:
An instruction processing apparatus includes a thread execution processing section executing threads each including plural instructions, a register file including a register window having plural registers, a current window pointer indicating a position of the register where the register window is possible to be inputted and outputted, a current register reading data held by the register window designated by the current window pointer to hold the data and a replacement buffer holding data transferred from the register file to the current register, a first transfer path transferring data in a register file to one of the replacement buffer, a second data transfer transferring data in a replacement buffer to one of the current registers, a calculation section executing a switching instruction of the register window, and a control section controlling, if the calculation section executes the switching instruction, the first data transfer path and the second data transfer path.
Public/Granted literature
- US07962732B2 Instruction processing apparatus Public/Granted day:2011-06-14
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