A chip having integrated multiple processor cores and a data processing method are disclosed. The processor chip includes an MP core (main processor core), an AP core (application processor core) which performs a processing function designated by a control of the MP core, a first SM controller which sets a path such that the MP core is coupled with a shared memory, and a second SM controller which sets a path such that the AP core is coupled with the shared memory. By virtue of the present invention, the number of chips installed can be minimized, to allow efficient utilization of PCB space and enable a compact size for a portable terminal.