发明申请
- 专利标题: Method and Apparatus for Circuit Simulation
- 专利标题(中): 电路仿真方法与装置
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申请号: US12272141申请日: 2008-11-17
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公开(公告)号: US20100125440A1公开(公告)日: 2010-05-20
- 发明人: Charles H. Moore
- 申请人: Charles H. Moore
- 申请人地址: US CA Cupertino
- 专利权人: VNS PORTFOLIO LLC
- 当前专利权人: VNS PORTFOLIO LLC
- 当前专利权人地址: US CA Cupertino
- 主分类号: G06F17/50
- IPC分类号: G06F17/50 ; G06F7/38
摘要:
A method of preparing a circuit simulator, said method comprising initializing a normalized adjusted gate voltage value. Then performing the steps of determining a normalized adjusted gate voltage datum in dependence upon the initial normalized adjusted gate voltage value. Storing the normalized adjusted gate voltage datum at a memory address in a one-dimensional array based on the normalized adjusted gate voltage. Decrementing the normalized adjusted gate voltage value by a predetermined decrement amount. And verifying the decremented gate voltage value. Then repeating until a stop gate voltage value is reached.