发明申请
- 专利标题: APPARATUS AND METHOD FOR CODING QC-LDPC CODE
- 专利标题(中): 用于编码QC-LDPC码的设备和方法
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申请号: US12642463申请日: 2009-12-18
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公开(公告)号: US20100162074A1公开(公告)日: 2010-06-24
- 发明人: Jong-Ee OH , Minho CHEONG , Yu-Ro LEE , Sok-Kyu LEE , Yongho LEE
- 申请人: Jong-Ee OH , Minho CHEONG , Yu-Ro LEE , Sok-Kyu LEE , Yongho LEE
- 申请人地址: KR Daejon
- 专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人地址: KR Daejon
- 优先权: KR10-2008-0130462 20081219
- 主分类号: H03M13/05
- IPC分类号: H03M13/05 ; G06F11/10
摘要:
A high-speed quasi-cyclic low density parity check (QC-LDPC) coding apparatus for coding inputted information into a generator matrix having a dual diagonal matrix format includes: a parity bit generation unit configured to generate an arbitrary parity bit; a temporary parity bit generation unit configured to constitute the inputted information with circulants, and shift and combine the respective circulants at each row to generate a temporary parity bit; a corrected bit generation unit configured to generate corrected bits of parity bits by using an output of the temporary parity bit generation unit; and a parity bit correction unit configured to correct the temporary parity bit by reflecting an output of the corrected bit generation unit to the output of the temporary parity bit generation unit.