发明申请
US20100190311A1 Method of Forming a MEMS Topped Integrated Circuit with a Stress Relief Layer
有权
形成具有应力消除层的MEMS顶部集成电路的方法
- 专利标题： Method of Forming a MEMS Topped Integrated Circuit with a Stress Relief Layer
- 专利标题（中）： 形成具有应力消除层的MEMS顶部集成电路的方法
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申请号： US12750145申请日： 2010-03-30
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公开(公告)号： US20100190311A1公开(公告)日： 2010-07-29
- 发明人: Peter Smeys , Peter Johnson
- 申请人： Peter Smeys , Peter Johnson
- 主分类号： H01L21/02
- IPC分类号： H01L21/02
摘要：
The bow in a wafer that results from fabricating a large number of MEMS devices on the top surface of the passivation layer of the wafer so that a MEMS device is formed over each die region is reduced by forming a stress relief layer between the passivation layer and the MEMS devices.
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