Direct memory access (‘DMA’) in a hybrid computing environment that includes a host computer, an accelerator, the host computer and the accelerator adapted to one another for data communications by a system level message passing module, where DMA includes identifying, by the system level message passing module, a buffer of data to be transferred from the host computer to the accelerator according to a DMA protocol; segmenting, by the system level message passing module, the buffer of data into a predefined number of memory segments; pinning, by the system level message passing module, the memory segments against paging; and asynchronously with respect to pinning the memory segments, effecting, by the system level message passing module, DMA transfers of the pinned memory segments from the host computer to the accelerator.