发明申请
US20100202706A1 IC LAYOUT PATTERN MATCHING AND CLASSIFICATION SYSTEM AND METHOD 失效
IC布局图案匹配和分类系统及方法

  • 专利标题: IC LAYOUT PATTERN MATCHING AND CLASSIFICATION SYSTEM AND METHOD
  • 专利标题(中): IC布局图案匹配和分类系统及方法
  • 申请号: US12370102
    申请日: 2009-02-12
  • 公开(公告)号: US20100202706A1
    公开(公告)日: 2010-08-12
  • 发明人: Maria GabraniPaul Hurley
  • 申请人: Maria GabraniPaul Hurley
  • 主分类号: G06K9/62
  • IPC分类号: G06K9/62
IC LAYOUT PATTERN MATCHING AND CLASSIFICATION SYSTEM AND METHOD
摘要:
A system and method for restricting the number of layout patterns by pattern identification, matching and classification, includes decomposing the pattern windows into a low frequency component and a high frequency component using a wavelet analysis for an integrated circuit layout having a plurality of pattern windows. Using the low frequency component as an approximation, a plurality of moments is computed for each pattern window. The pattern windows are classified using a distance computation for respective moments of the pattern windows by comparing the distance computation to an error value to determine similarities between the pattern windows.
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