Invention Application
US20100205407A1 PIPELINED MICROPROCESSOR WITH FAST NON-SELECTIVE CORRECT CONDITIONAL BRANCH INSTRUCTION RESOLUTION
有权
具有快速非选择性正确条件分支指令解决方案的管道微处理器
- Patent Title: PIPELINED MICROPROCESSOR WITH FAST NON-SELECTIVE CORRECT CONDITIONAL BRANCH INSTRUCTION RESOLUTION
- Patent Title (中): 具有快速非选择性正确条件分支指令解决方案的管道微处理器
-
Application No.: US12481511Application Date: 2009-06-09
-
Publication No.: US20100205407A1Publication Date: 2010-08-12
- Inventor: G. Glenn Henry , Terry Parks , Brent Bean
- Applicant: G. Glenn Henry , Terry Parks , Brent Bean
- Applicant Address: TW Taipei
- Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee Address: TW Taipei
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/30
Abstract:
A microprocessor includes a pipeline of stages for processing instructions and first and second types of conditional branch instruction includable by a program. The microprocessor makes a prediction of conditional branch instructions of the first type and flushes the pipeline of instructions if the prediction is subsequently determined to be incorrect, thereby incurring a branch misprediction penalty related to processing of conditional branch instructions of the first type. The microprocessor always correctly resolves conditional branch instructions of the second type without making a prediction of conditional branch instructions of the second type, thereby avoiding ever incurring a branch misprediction penalty related to processing of conditional branch instructions of the second type.
Public/Granted literature
- US08521996B2 Pipelined microprocessor with fast non-selective correct conditional branch instruction resolution Public/Granted day:2013-08-27
Information query
