An array substrate for a liquid crystal display device includes gate and data lines crossing on a substrate, common lines parallel to and between the gate lines, thin film transistors at crossing portions of the gate and data lines, and a pixel electrode. The common lines define pixel regions, which are each divided into first and second regions by the corresponding gate line. The thin film transistors each include a gate electrode in a first direction, a semiconductor layer on the gate electrode, and source and drain electrodes on the semiconductor layer in a second direction. The source and drain electrodes cross the gate electrode in each of the first and second regions. The pixel electrode is connected to the drain electrode.