发明申请
US20100289077A1 DUAL GATE OF SEMICONDUCTOR DEVICE CAPABLE OF FORMING A LAYER DOPED IN HIGH CONCENTRATION OVER A RECESSED PORTION OF SUBSTRATE FOR FORMING DUAL GATE WITH RECESS CHANNEL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME 失效
形成用于形成用于形成具有输入通道结构的双门基板的基板的高浓度层的半导体器件的双栅极及其制造方法

  • 专利标题: DUAL GATE OF SEMICONDUCTOR DEVICE CAPABLE OF FORMING A LAYER DOPED IN HIGH CONCENTRATION OVER A RECESSED PORTION OF SUBSTRATE FOR FORMING DUAL GATE WITH RECESS CHANNEL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
  • 专利标题(中): 形成用于形成用于形成具有输入通道结构的双门基板的基板的高浓度层的半导体器件的双栅极及其制造方法
  • 申请号: US12843184
    申请日: 2010-07-26
  • 公开(公告)号: US20100289077A1
    公开(公告)日: 2010-11-18
  • 发明人: Young Hoon KIM
  • 申请人: Young Hoon KIM
  • 申请人地址: KR Kyoungki-do
  • 专利权人: HYNIX SEMICONDUCTOR INC.
  • 当前专利权人: HYNIX SEMICONDUCTOR INC.
  • 当前专利权人地址: KR Kyoungki-do
  • 优先权: KR10-2007-0116054 20071114
  • 主分类号: H01L27/092
  • IPC分类号: H01L27/092
DUAL GATE OF SEMICONDUCTOR DEVICE CAPABLE OF FORMING A LAYER DOPED IN HIGH CONCENTRATION OVER A RECESSED PORTION OF SUBSTRATE FOR FORMING DUAL GATE WITH RECESS CHANNEL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
摘要:
A dual gate of a semiconductor device includes a semiconductor substrate divided into a cell region with a recessed gate forming area and a peripheral region with PMOS and NMOS forming areas; first and second conductive type SiGe layers, the first conductive type SiGe layer being formed over the cell region and the PMOS forming area of the peripheral region, and the second conductive type SiGe layer being formed over the NMOS forming area of the peripheral region; first and second conductive type polysilicon layers, the first conductive type polysilicon layer being formed over the first conductive type SiGe layer and the second conductive type polysilicon layer being formed over the second conductive type SiGe layer; and a metallic layer and a hard mask layer stacked over the first and second conductive type polysilicon layers.
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