发明申请
- 专利标题: PROCESSOR PERFORMANCE ANALYSIS DEVICE, METHOD, AND SIMULATOR
- 专利标题(中): 处理器性能分析装置,方法和模拟器
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申请号: US12864935申请日: 2009-01-23
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公开(公告)号: US20100332690A1公开(公告)日: 2010-12-30
- 发明人: Osamu Kawamura , Atsushi Ubukata
- 申请人: Osamu Kawamura , Atsushi Ubukata
- 申请人地址: JP Osaka
- 专利权人: PANASONIC CORPORATION
- 当前专利权人: PANASONIC CORPORATION
- 当前专利权人地址: JP Osaka
- 优先权: JP2008-017714 20080129
- 国际申请: PCT/JP2009/000246 WO 20090123
- 主分类号: G06F3/00
- IPC分类号: G06F3/00 ; G06F12/10
摘要:
A processor performance analysis device analyzes performance of a multithreaded processor in a system LSI which includes: the multithreaded processor which executes processing in parallel using multiple logical processors; a functional core which executes processing different from the processing executed by the multithreaded processor; and a memory interface which receives each access request and controls access to memory. The processor performance analysis device includes: an operational information output unit which monitors the multithreaded processor to output operational information; an access information output unit which monitors the memory interface to output memory access information; and an analysis information output unit which analyzes the performance of the multithreaded processor using the operational information and the memory access information.
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