发明申请
US20110026532A1 Forwarding Data Through a Three-Stage Clos-Network Packet Switch with Memory at each Stage 有权
在每个阶段通过具有内存的三级Clos-Network分组交换机转发数据

  • 专利标题: Forwarding Data Through a Three-Stage Clos-Network Packet Switch with Memory at each Stage
  • 专利标题(中): 在每个阶段通过具有内存的三级Clos-Network分组交换机转发数据
  • 申请号: US12511814
    申请日: 2009-07-29
  • 公开(公告)号: US20110026532A1
    公开(公告)日: 2011-02-03
  • 发明人: Roberto Rojas-CessaZiqian Dong
  • 申请人: Roberto Rojas-CessaZiqian Dong
  • 主分类号: H04L12/56
  • IPC分类号: H04L12/56
Forwarding Data Through a Three-Stage Clos-Network Packet Switch with Memory at each Stage
摘要:
Examples are disclosed for forwarding data partitioned into one or more cells through at least a portion of a three-stage memory-memory-memory (MMM) input-queued Clos-network (IQC) packet switch. In some examples, each module of the three-stage MMM IQC packet switch includes a virtual queue and a manager that are configured in cooperation with one another to forward cells through at least a portion of the switch. The cells may have been partitioned and stored at an input port for the switch and destined for an output port for the switch.
信息查询
0/0