发明申请
US20110047524A1 SYSTEM AND METHOD FOR INSPECTING LAYOUT OF A PRINTED CIRCUIT BOARD
失效
用于检查印刷电路板布局的系统和方法
- 专利标题: SYSTEM AND METHOD FOR INSPECTING LAYOUT OF A PRINTED CIRCUIT BOARD
- 专利标题(中): 用于检查印刷电路板布局的系统和方法
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申请号: US12701677申请日: 2010-02-08
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公开(公告)号: US20110047524A1公开(公告)日: 2011-02-24
- 发明人: HSIEN-CHUAN LIANG , SHEN-CHUN LI , CHUN-JEN CHEN , SHOU-KUO HSU , DUEN-YI HO , YUNG-CHIEH CHEN
- 申请人: HSIEN-CHUAN LIANG , SHEN-CHUN LI , CHUN-JEN CHEN , SHOU-KUO HSU , DUEN-YI HO , YUNG-CHIEH CHEN
- 申请人地址: TW Tu-Cheng
- 专利权人: HON HAI PRECISION INDUSTRY CO., LTD.
- 当前专利权人: HON HAI PRECISION INDUSTRY CO., LTD.
- 当前专利权人地址: TW Tu-Cheng
- 优先权: CN200910305836.1 20090820
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
A system and method for inspecting layout of a printed circuit board (PCB) provides a graphical user interface (GUI). The GUI displays a layout of the PCB. High side pins of a pulse width modulation (PWM) controller and a component connected to a high side pin are found. If the component is a metallic oxide semiconductor field effect transistor (MOSFET), the system calculate absolute a linear distance and a trace distance between a source pin of the MOSFET and a capacitor pin of a coupling capacitor connected to the source pin. If the linear distance, the trace distance and a capacitance of the coupling capacitor accord with a layout standard, the layout of the PCB is determined to be up to standard.
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