发明申请
- 专利标题: TRANSMITTING APPARATUS WITH BIT ARRANGEMENT METHOD
- 专利标题(中): 发送装置与位安排方法
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申请号: US12948341申请日: 2010-11-17
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公开(公告)号: US20110058625A1公开(公告)日: 2011-03-10
- 发明人: Tetsuya YANO , Kazuhisa OBUCHI , Shunji MIYAZAKI
- 申请人: Tetsuya YANO , Kazuhisa OBUCHI , Shunji MIYAZAKI
- 申请人地址: JP Kawasaki-shi
- 专利权人: FUJITSU LIMITED
- 当前专利权人: FUJITSU LIMITED
- 当前专利权人地址: JP Kawasaki-shi
- 优先权: JP2004-35768 20040212
- 主分类号: H04L27/00
- IPC分类号: H04L27/00
摘要:
A method of transmitting data by transmitting apparatus, that includes controlling generation of bit sequences to adjust an occupation rate of systematic bits in a first data block including systematic bits and parity bits, which is obtained by encoding first data in a first encoding process, and is equal or closer to an occupation rate of systematic bits in a second data block including systematic bits and parity bits, which is obtained by encoding second data in a second encoding process, and to adjust an occupation rate of parity bits in the first data block that is closer to an occupation rate of parity bits in the second data block, in regard to first bit positions of the bit sequences generated using bits included in the first and second data blocks and performs multi-level modulation for transmission based on the generated bit sequences.
公开/授权文献
- US08213535B2 Transmitting apparatus with bit arrangement method 公开/授权日:2012-07-03
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