发明申请
US20110067015A1 PROGRAM PARALLELIZATION APPARATUS, PROGRAM PARALLELIZATION METHOD, AND PROGRAM PARALLELIZATION PROGRAM 审中-公开
程序并行化设备,程序并行化方案和程序并行程序

  • 专利标题: PROGRAM PARALLELIZATION APPARATUS, PROGRAM PARALLELIZATION METHOD, AND PROGRAM PARALLELIZATION PROGRAM
  • 专利标题(中): 程序并行化设备,程序并行化方案和程序并行程序
  • 申请号: US12866219
    申请日: 2009-02-12
  • 公开(公告)号: US20110067015A1
    公开(公告)日: 2011-03-17
  • 发明人: Masamichi TakagiJunji Sakai
  • 申请人: Masamichi TakagiJunji Sakai
  • 优先权: JP2008-034614 20080215
  • 国际申请: PCT/JP2009/052309 WO 20090212
  • 主分类号: G06F9/45
  • IPC分类号: G06F9/45
PROGRAM PARALLELIZATION APPARATUS, PROGRAM PARALLELIZATION METHOD, AND PROGRAM PARALLELIZATION PROGRAM
摘要:
A program parallelization apparatus which generates a parallelized program of shorter parallel execution time is provided. The program parallelization apparatus inputs a sequential processing intermediate program and outputs a parallelized intermediate program. In the apparatus, a thread start time limitation analysis part analyzes an instruction-allocatable time based on a limitation on an instruction execution start time of each thread. A thread end time limitation analysis part analyzes an instruction-allocatable time based on a limitation on an instruction execution end time of each thread. An occupancy status analysis part analyzes a time not occupied by already-scheduled instructions. A dependence delay analysis part analyzes an instruction-allocatable time based on a delay resulting from dependence between instructions. A schedule candidate instruction select part selects a next instruction to schedule. An instruction arrangement part allocates a processor and time to execute to an instruction.
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