发明申请
- 专利标题: PACKAGE SUBSTRATE
- 专利标题(中): 包装基板
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申请号: US12614411申请日: 2009-11-07
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公开(公告)号: US20110067901A1公开(公告)日: 2011-03-24
- 发明人: Jin Ho KIM , Seok Kyu LEE , Jae Joon LEE , Sung Won JEONG
- 申请人: Jin Ho KIM , Seok Kyu LEE , Jae Joon LEE , Sung Won JEONG
- 优先权: KR10-2009-0090098 20090923
- 主分类号: H05K1/00
- IPC分类号: H05K1/00
摘要:
Disclosed is a package substrate, in which the plating area of a first plating layer formed on a layer which is to be connected to a motherboard is larger than the plating area of a second plating layer formed on a layer which is to be connected to an electronic part, and open portions are formed on the first plating layer, thus balancing the plating areas of the plating layers formed on the layers of the package substrate, thereby minimizing warpage of the package substrate due to differing coefficients of thermal expansion.
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