An inverter is configured by double gate TFTs, and an inverter is configured by double gate TFTs. Top gate terminals of the TFTs that configure the inverter are connected to an input terminal DAT(+), and bottom gate terminals are connected to an output of the inverter and an output terminal OUT. Bottom gate terminals of the TFTs that configure the inverter are connected to an input terminal DAT(−), and bottom gate terminals are connected to an output of the inverter. With this, threshold voltages of the inverters are controlled so as to facilitate switching operations of the inverters, and whereby the comparator circuit operates at a high speed. It is possible to obtain a comparator circuit that is insusceptible to a variation in the threshold voltages of the transistors and fluctuation of a common mode voltage of an input signal and capable of operating at a high speed.