发明申请
US20110069840A1 DIGITAL TO ANALOG CONVERTER SYSTEM AND METHOD WITH MULTI-LEVEL SCRAMBLING
有权
数字到模拟转换器系统和方法与多级SCRAMBLING
- 专利标题: DIGITAL TO ANALOG CONVERTER SYSTEM AND METHOD WITH MULTI-LEVEL SCRAMBLING
- 专利标题(中): 数字到模拟转换器系统和方法与多级SCRAMBLING
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申请号: US12624413申请日: 2009-11-24
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公开(公告)号: US20110069840A1公开(公告)日: 2011-03-24
- 发明人: John Jude O'Donnell , Frederick Carnegie Thompson
- 申请人: John Jude O'Donnell , Frederick Carnegie Thompson
- 主分类号: H04L9/00
- IPC分类号: H04L9/00
摘要:
Tri-level scrambling in a digital to analog converter system is achieved by, in response to a tri-level binary code input, disabling a negative data directed scrambler circuit when the input code is in the positive cycle portion, disabling a positive data directed scrambler circuit when the input code is in the negative cycle portion and disabling both scrambler circuits upon a zero input code for reducing low level distortion due to a reversal of current during crossover between those cycles.
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