发明申请
US20110076810A1 Three Dimensional Multilayer Circuit 有权
三维多层电路

Three Dimensional Multilayer Circuit
摘要:
A method for forming three-dimensional multilayer circuit includes forming an area distributed CMOS layer configured to selectively address a set of first vias and a set of second vias. A template is then aligned with the first set of vias and lower crossbar segments are created using the template. The template is then removed, rotated, and aligned with the set of second vias. Upper crossbar segments which attach to the second set of vias are then created.
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