发明申请
US20110078463A1 METHOD, SYSTEM AND APPARATUS FOR LOW-POWER STORAGE OF PROCESSOR CONTEXT INFORMATION
有权
用于处理器上下文信息的低功率存储的方法,系统和装置
- 专利标题: METHOD, SYSTEM AND APPARATUS FOR LOW-POWER STORAGE OF PROCESSOR CONTEXT INFORMATION
- 专利标题(中): 用于处理器上下文信息的低功率存储的方法,系统和装置
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申请号: US12567707申请日: 2009-09-25
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公开(公告)号: US20110078463A1公开(公告)日: 2011-03-31
- 发明人: Bruce L. Fleming , Ashish V. Choubal , Sanjoy K. Mondal , Belliappa M. Kuttanna
- 申请人: Bruce L. Fleming , Ashish V. Choubal , Sanjoy K. Mondal , Belliappa M. Kuttanna
- 主分类号: G06F1/00
- IPC分类号: G06F1/00 ; G06F12/16
摘要:
A method and system for saving and/or retrieving context information of a processor core for a power state transition. The processor core resides in a complex power domain variously transitioning between a plurality of power states. The processor core includes a local context storage area for storage and retrieval of processor core context information. A low power context storage resides in a nominal power domain external to the complex power domain. Context information of the processor core is stored to the low power context storage based on whether a power state transition of the complex power domain includes a transition to power down the processor core.