- 专利标题： METHODS FOR PROTECTING GATE STACKS DURING FABRICATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES FABRICATED FROM SUCH METHODS
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申请号： US12604281申请日： 2009-10-22
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公开(公告)号： US20110095341A1公开(公告)日： 2011-04-28
- 发明人: Rohit Pal , Michael Hargrove , Frank Bin Yang
- 申请人： Rohit Pal , Michael Hargrove , Frank Bin Yang
- 申请人地址： KY Grand Cayman
- 专利权人： GLOBALFOUNDRIES INC.
- 当前专利权人： GLOBALFOUNDRIES INC.
- 当前专利权人地址： KY Grand Cayman
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/336
摘要：
Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods are provided. Methods for fabricating a semiconductor device include providing a semiconductor substrate having an active region and a shallow trench isolation (STI) region. Epitaxial layer is formed on the active region to define a lateral overhang portion in a divot at the active region/STI region interface. A gate stack is formed having a first gate stack-forming layer overlying the semiconductor substrate. First gate stack-forming layer includes a non-conformal layer of metal gate-forming material which is directionally deposited to form a thinned break portion just below the lateral overhang portion. After the step of forming the gate stack, a first portion of the non-conformal layer is in the gate stack and a second portion is exposed. The thinned break portion at least partially isolates the first and second portions during subsequent etch chemistries.
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