发明申请
- 专利标题: Flip-chip underfill
- 专利标题(中): 倒装底片
-
申请号: US12776262申请日: 2010-05-07
-
公开(公告)号: US20110115099A1公开(公告)日: 2011-05-19
- 发明人: Marcos Karnezos
- 申请人: Marcos Karnezos
- 申请人地址: US CA Scotts Valley
- 专利权人: Vertical Circuits, Inc.
- 当前专利权人: Vertical Circuits, Inc.
- 当前专利权人地址: US CA Scotts Valley
- 主分类号: H01L23/498
- IPC分类号: H01L23/498 ; H01L21/60
摘要:
A method for flip-chip interconnection includes applying a dielectric film onto the active side of the die, or onto the die mount side of the substrate, or both onto the die and onto the substrate; then orienting and aligning the die in relation to the substrate, and moving the die toward the substrate so that interconnect contact is made; then treating the assembly (for example by heating or by heating and pressing) to complete the electrical connections and to cause the film to soften and to adhere. Also, a method for flip-chip assembly includes completing electrical connection of the flip-chip interconnects on a die with bond pads on a substrate and thereafter exposing the assembly to a CVD process to fill the headspace between the die and the substrate with a dielectric material. Also, a flip-chip assembly is made by the method. Also, a die or a substrate is prepared for flip-chip interconnection by applying a dielectric film on a surface thereof.
信息查询
IPC分类: