发明申请
- 专利标题： CHIP PACKAGE AND FABRICATION METHOD THEREOF
- 专利标题（中）： 芯片包装及其制造方法
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申请号： US12687093申请日： 2010-01-13
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公开(公告)号： US20110169139A1公开(公告)日： 2011-07-14
- 发明人: Chia-Sheng Lin , Chia-Lun Tsai , Chang-Sheng Hsu , Po-Han Lee
- 申请人： Chia-Sheng Lin , Chia-Lun Tsai , Chang-Sheng Hsu , Po-Han Lee
- 主分类号： H01L23/48
- IPC分类号： H01L23/48 ; H01L21/78
摘要：
A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposite second surface. A through hole is formed on the first surface, extending from the first surface to the second surface. A conductive trace layer is formed on the first surface and in the through hole. A buffer plug is formed in the through hole and a protection layer is formed over the first surface and in the through hole.
公开/授权文献
- US08432032B2 Chip package and fabrication method thereof 公开/授权日：2013-04-30
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