Invention Application
US20110180850A1 Configuration and manufacturing method of low-resistance gate structures for semiconductor devices and circuits 有权
半导体器件和电路的低电阻栅极结构的配置和制造方法

Configuration and manufacturing method of low-resistance gate structures for semiconductor devices and circuits
Abstract:
The present invention provides methods for fabricating devices with low resistance structures involving a lift-off process. A radiation blocking layer is introduced between two resist layers in order to prevent intermixing of the photoresists. Cavities suitable for the formation of low resistance T-gates or L-gates can be obtained by a first exposure, developing, selective etching of blocking layer and a second exposure and developing. In another embodiment, a low resistance gate structure with pillars to enhance mechanical stability or strength is provided.
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