发明申请
US20110185331A1 Reducing Voltage Drops in Power Networks Using Unused Spaces in Integrated Circuits
有权
降低集成电路中未使用空间的电力网络中的电压降
- 专利标题: Reducing Voltage Drops in Power Networks Using Unused Spaces in Integrated Circuits
- 专利标题(中): 降低集成电路中未使用空间的电力网络中的电压降
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申请号: US12692184申请日: 2010-01-22
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公开(公告)号: US20110185331A1公开(公告)日: 2011-07-28
- 发明人: Dinesh Baviskar , Wen-Hao Chen , Chung-Sheng Yuan , Mark Shane Peng , Yun-Han Lee
- 申请人: Dinesh Baviskar , Wen-Hao Chen , Chung-Sheng Yuan , Mark Shane Peng , Yun-Han Lee
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
A method of designing an integrated circuit includes providing an integrated circuit design including a power network. A voltage drop mitigation system is provided, which includes a power strap enhancer configured to automatically find a source node and a terminal node in the power network. A redundant strap for the power network using the voltage drop mitigation system is added, wherein the redundant strap interconnects the source node and the terminal node. After the step of adding the redundant strap, dummy patterns may be added.
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