发明申请
US20110191739A1 CIRCUIT DESIGN METHOD, CIRCUIT DESIGN SYSTEM, AND RECORDING MEDIUM
审中-公开
电路设计方法，电路设计系统和记录介质
- 专利标题： CIRCUIT DESIGN METHOD, CIRCUIT DESIGN SYSTEM, AND RECORDING MEDIUM
- 专利标题（中）： 电路设计方法，电路设计系统和记录介质
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申请号： US13121829申请日： 2009-09-25
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公开(公告)号： US20110191739A1公开(公告)日： 2011-08-04
- 发明人: Takashi Hasegawa , Shinya Sato
- 申请人： Takashi Hasegawa , Shinya Sato
- 申请人地址： JP Tokyo
- 专利权人： ADVANTEST CORPORATION
- 当前专利权人： ADVANTEST CORPORATION
- 当前专利权人地址： JP Tokyo
- 优先权： JP2008-255056 20080930
- 国际申请： PCT/JP2009/004867 WO 20090925
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A circuit design method for interconnecting a plurality of modules includes: a step of acquiring port information including input ports and output ports of the plurality of modules; a step of acquiring instance information indicating that, among the plurality of modules, there is a module including a plurality of instances having the same function; and a step of associating the input ports and the output ports based on the port information and the instance information to interconnect the plurality of modules.