发明申请
- 专利标题: LEAD FRAME FOR SEMICONDUCTOR DIE
- 专利标题(中): 半导体引线框架
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申请号: US13004031申请日: 2011-01-11
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公开(公告)号: US20110193207A1公开(公告)日: 2011-08-11
- 发明人: Zhaojun Tian , Qingchun He , Qiang Liu , Jie Yang , Shufeng Zhao
- 申请人: Zhaojun Tian , Qingchun He , Qiang Liu , Jie Yang , Shufeng Zhao
- 申请人地址: US TX Austin
- 专利权人: FREESCALE SEMICONDUCTOR, INC
- 当前专利权人: FREESCALE SEMICONDUCTOR, INC
- 当前专利权人地址: US TX Austin
- 优先权: CN20100135577.5 20100209
- 主分类号: H01L23/495
- IPC分类号: H01L23/495
摘要:
A lead frame for providing electrical interconnection to a semiconductor die has a generally rectangular flag area having first and second major surfaces and four sides. The flag area is sized and shaped to receive a semiconductor die on one of the first and second major surfaces. A first row of leads is located adjacent to a first one of the four sides of the flag area and a second row of leads is located adjacent to a second one of the four sides of the flag area, where the second one of the four sides is adjacent to the first one of the four sides. The remaining two sides do not have any adjacent leads.