发明申请
US20110193207A1 LEAD FRAME FOR SEMICONDUCTOR DIE 审中-公开
半导体引线框架

LEAD FRAME FOR SEMICONDUCTOR DIE
摘要:
A lead frame for providing electrical interconnection to a semiconductor die has a generally rectangular flag area having first and second major surfaces and four sides. The flag area is sized and shaped to receive a semiconductor die on one of the first and second major surfaces. A first row of leads is located adjacent to a first one of the four sides of the flag area and a second row of leads is located adjacent to a second one of the four sides of the flag area, where the second one of the four sides is adjacent to the first one of the four sides. The remaining two sides do not have any adjacent leads.
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