发明申请
US20110218792A1 Mixed Concurrent And Serial Logic Simulation Of Hardware Designs 有权
混合并行和串行逻辑仿真硬件设计

Mixed Concurrent And Serial Logic Simulation Of Hardware Designs
摘要:
A method of simulating a design described in HDL is provided. In this method, modules of the design can be partitioned into first modules for simulation by a serial simulation engine and second modules for simulation by a concurrent simulation engine. The first and second modules can be prioritized for simulation based on classes of events consistent with an execution model of the HDL. Simulations of the serial and concurrent simulation engines can be synchronized for each class of events. Synchronizing can include transferring updated interface variable values, which are shared by the second modules and at least a subset of the first modules, between the serial simulation engine and the concurrent simulation engine. This transferring can include translating representations of the updated interface variable values.
信息查询
0/0