发明申请
- 专利标题： NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
- 专利标题（中）： 非易失性半导体存储器件
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申请号： US13044892申请日： 2011-03-10
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公开(公告)号： US20110228586A1公开(公告)日： 2011-09-22
- 发明人: Suguru KAWABATA , Shinobu Yamazaki , Yoshiji Ohta , Kazuya Ishihara , Nobuyoshi Awaya , Akio Kitagawa , Kazuya Nakayama
- 申请人： Suguru KAWABATA , Shinobu Yamazaki , Yoshiji Ohta , Kazuya Ishihara , Nobuyoshi Awaya , Akio Kitagawa , Kazuya Nakayama
- 优先权： JP2010-060188 20100317
- 主分类号： G11C11/34
- IPC分类号： G11C11/34
摘要：
A nonvolatile semiconductor memory device includes a bit voltage adjusting circuit which, for each bit line, fixes potentials of a selected bit line and a non-selected bit line to a predetermined potential to perform a memory operation and a data voltage adjusting circuit which, for each data line, fixes potentials of a selected data line and a non-selected data line to a predetermined potential to perform a memory operation. Each of the voltage adjusting circuits includes an operational amplifier and a transistor, a voltage required for a memory operation is input to the non-inverted input terminal of the operational amplifier, and the inverted input terminal of the operational amplifier is connected to the bit line or the data line, so that the potential of the bit line or the data line is fixed to a potential of the non-inverted input terminal of the operational amplifier.
公开/授权文献
- US08422270B2 Nonvolatile semiconductor memory device 公开/授权日：2013-04-16