Invention Application
- Patent Title: Integrated Circuit Packages
- Patent Title (中): 集成电路封装
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Application No.: US13154540Application Date: 2011-06-07
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Publication No.: US20110233745A1Publication Date: 2011-09-29
- Inventor: Setho Sing Fee , Lim Thiam Chye , Tongbi Jiang
- Applicant: Setho Sing Fee , Lim Thiam Chye , Tongbi Jiang
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Priority: SG200703582-7 20070517
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
Some embodiments include methods of assembling integrated circuit packages in which at least two different conductive layers are formed over a bond pad region of a semiconductor die, and in which a conductive projection associated with an interposer is bonded through a gold ball to an outermost of the at least two conductive layers. The conductive layers may comprise one or more of silver, gold, copper, chromium, nickel, palladium, platinum, tantalum, titanium, vanadium and tungsten. In some embodiments, the bond pad region may comprise aluminum, an inner of the conductive layers may comprise nickel, an outer of the conductive layers may comprise gold, the conductive projection associated with the interposer may comprise gold; and the thermosonic bonding may comprise gold-to-gold bonding of the interposer projection to a gold ball, and gold-to-gold bonding of the outer conductive layer to the gold ball. Some embodiments include integrated circuit packages.
Public/Granted literature
- US08531031B2 Integrated circuit packages Public/Granted day:2013-09-10
Information query
IPC分类: